AI Power and Optics: The Hidden Thermal Friction Risk in AI Data Centers
Rising compute workloads increase power consumption and data flow in AI data centers, requiring more efficient power delivery and faster data movement. This drives demand for technologies such as NVTS power chips and POET optical interposers. Navitas Semiconductor’s (NVTS) gallium nitride (GaN) and silicon carbide (SiC) power chips improve efficiency across AI power delivery stacks, while POET’s optical interposer enables faster data movement by replacing copper pathways at the GPU.
Despite these gains, the convergence of increased power and faster data movement introduces a nuanced challenge: localized thermal friction. If unmanaged, this heat can limit system performance and erode the efficiency gains these technologies are designed to deliver.
NVTS and POET: power delivery and data movement
Navitas has positioned itself as a supplier of efficient power chips for AI data centers. Its use of GaN and SiC increases power delivery and switching speeds, enabling data centers to handle rising compute workloads more efficiently than legacy silicon solutions.
POET’s optical interposer addresses the data movement constraint by replacing copper pathways at the GPU, enabling faster data transfer as copper interconnects approach physical bandwidth limits. Together, these technologies enable increased power and data flow within AI data centers, supporting the scaling required to handle rising compute workloads.
The hidden challenge: localized thermal friction in integrated systems
Despite efficiency improvements, NVTS and POET technologies contribute to localized thermal friction within AI data centers, as power delivery systems push more power into racks and optical interconnects increase data movement.
GaN and SiC chips still generate heat that becomes concentrated in power delivery stages. Likewise, optical engines operate in dense environments, creating thermal bottlenecks that offset their efficiency gains.
Material and packaging solutions: how NVTS and POET manage heat
To mitigate localized thermal friction, both Navitas and POET leverage material and package integration strategies. NVTS’ integrated GaN and SiC chips replace discrete silicon chips to improve power delivery efficiency. This reduces waste heat by minimizing thermal resistance across the power delivery stages.
POET’s optical interposer integrates optical pathways within the package, replacing copper interconnects and reducing resistive losses and associated heat generation within data interconnects. These engineering choices reinforce how material selection and package integration shape both electrical and thermal performance.
Residual system level constraints: why cooling still matters
Even with material and packaging efficiency gains from NVTS and POET, heat generated within power delivery and optical interconnects remains a limiting factor. In addition, AI data centers concentrate power delivery, data interconnects, compute hardware, and memory and networking components within compact footprints, increasing localized thermal friction.
Achieving optimal performance therefore requires cooling strategies that extend beyond power delivery and data interconnects to the entire AI data center. Without effective thermal management via optimized airflow, liquid cooling, or heat sinks, throttling will erode the benefits of increased power delivery and faster data movement from NVTS and POET.
Implications for AI data center deployment and infrastructure planning
The combination of increased power delivery and data movement, along with other components integrated in a compact footprint, creates a hidden thermal friction risk for AI data centers. The performance and reliability of data centers ultimately depends on managing heat, ensuring that efficiency is not limited by thermal constraints, which must be addressed through cooling infrastructure.
Disclosure: This article reflects the author’s personal analysis and opinions and is not investment advice. The author holds shares in Navitas Semiconductor (NVTS) at the time of writing. Images used are independent illustrative renderings and are not official Navitas Semiconductor promotional materials.
RISK PROFILE
Thermal Constraint: Increasing power delivery and data movement within AI data centers concentrates heat at localized points, which, if not effectively managed at the system level, can erode the efficiency gains provided by NVTS power chips and POET optical interposers.